Developing an innovative low-power and high-speed architecture for smart machines (Old ID 25065)

Principal Investigator

This project aims to significantly improve the processing speed and power consumption of intelligent, mobile computing devices. Using a novel computing architecture inspired by the low-energy, parallel processing of the brain, the project will overcome a major impediment to progress, that placing ever more transistors on electronic chips is reaching its physical limits. The intended outcomes include important theoretical advances in electronic engineering, a new architecture enabling intelligent devices to operate independently of remote supercomputers, and a software trial in a robot. Applicable to devices ranging from smartphones to medical diagnostic equipment to autonomous vehicles, the new architecture promises significant benefits.

01 Jul 2018 - 31 Dec 2018

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