Toward A Formalized Approach for Spike Sorting Algorithms and Hardware Evaluation

Conference Publication ResearchOnline@JCU
Zhang, Tim;Lammie, Corey;Azghadi, Mostafa Rahimi;Amirsoleimani, Amirali;Ahmadi, Majid;Genov, Roman
Abstract

Spike sorting algorithms are used to separate extracellular recordings of neuronal populations into single-unit spike activities. The development of customized hardware implementing spike sorting algorithms is burgeoning. However, there is a lack of a systematic approach and a set of standardized evaluation criteria to facilitate direct comparison of both software and hardware implementations. In this paper, we formalize a set of standardized criteria and a publicly available synthetic dataset entitled Synthetic Simulations Of Extracellular Recordings (SSOER), which was constructed by aggregating existing synthetic datasets with varying Signal-To-Noise Ratios (SNRs). Furthermore, we present a benchmark for future comparison, and use our criteria to evaluate a simulated Resistive Random-Access Memory (RRAM) In-Memory Computing (IMC) system using the Discrete Wavelet Transform (DWT) for feature extraction. Our system consumes approximately (per channel) 10.72mW and occupies an area of 0.66mm2 in a 22nm FDSOI Complementary Metal-Oxide-Semiconductor (CMOS) process.

Journal

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Publication Name

Midwest Symposium on Circuits and Systems

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ISBN/ISSN

9781665402798

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Pages Count

5

Location

Fukuoka, Japan

Publisher

Institute of Electrical and Electronics Engineers

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Publisher Location

Piscataway, NJ, USA

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Date

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EISSN

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DOI

10.1109/MWSCAS54063.2022.9859357