MemTorch: a simulation framework for deep memristive cross-bar architectures

Conference Publication ResearchOnline@JCU
Lammie, Corey;Rahimi Azghadi, Mostafa
Abstract

Memristive devices arranged in cross-bar architectures have shown great promise to facilitate the acceleration and improve the power efficiency of Deep Learning (DL) systems for deployment in resource-constrained platforms, such as the Internet-of-Things (IoT) edge devices. These cross-bar architectures can be used to implement various in-memory computing operations, such as Multiply-Accumulate (MAC) and convolution, which are used extensively in Deep Neural Networks (DNNs) and Convolutional Neural Networks (CNNs). Currently, there is a lack of an open source, general, high-level simulation platform that can fully integrate any behavioral or experimental memristive device model into cross-bar architectures. This paper presents such a framework named MemTorch, which integrates directly with the well-known PyTorch Machine Learning (ML) library. To demonstrate an example practical use of MemTorch, we use it to simulate the performance degradation that non-ideal devices introduce to a typical Memristive DNN (MDNN) implementing VGG-16 for CIFAR-10. Our open source 1 MemTorch framework can be used by circuit and system designers to conveniently build customized large-scale simulation platforms, as a preliminary step before circuit-level realization.

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Publication Name

2020 IEEE International Symposium on Circuits and Systems (ISCAS)

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ISBN/ISSN

978-1-7281-3320-1

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Pages Count

5

Location

Seville, Spain

Publisher

Institute of Electrical and Electronics Engineers

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Publisher Location

Piscataway, NJ, USA

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DOI

10.1109/ISCAS45731.2020.9180810